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AGC_Amp (Voltage-Controlled Amplifier for AGC loops)

Symbol

Available in ADS

Parameters

Name

Description

Units

Default

ZRef

Reference resistance for all ports

Ohm

50

S11

Forward reflection coefficient, use x + j × y, polar(x,y), dbpolar(x,y), vswrpolar(x,y) for complex value

None

polar(0,0)

S22

Reverse reflection coefficient, use x + j × y, polar(x,y), dbpolar(x,y), vswrpolar(x,y) for complex value

None

polar(0,180)

Min_dB

Minimum gain; occurs when _v3 = Min_dB volt

dB

−40

Max_dB

Maximum gain; occurs when _v3 = Max_dB volt

dB

40

NF

Noise Figure [NF mode used for NFmin=0]

dB

0

SOI

Second Order Intercept

dBm

1000

TOI

Third Order Intercept

dBm

1000

Range of Usage

ZRef > 0
| Sij | > 0 (ij=11; 22)
Min_dB < Max_dB
NF ≥ 0 dB

Notes/Equations
  1. AGC_Amp is a voltage-controlled amplifier with user-defined input and output reflection coefficients, minimum and maximum gain limits, and nonlinearity.
  2. This component uses internal components TwoPort, Noisy2Port, AmplifierVC, and Amplifier2, as shown in the schematic.
  3. Control voltage at pin 3 is used to set gain. Under small signal conditions, gain in dB as a function of the control voltage at port 3: _v3 is:
    Gain_dB = max( Min_dB, min( Max_dB, _v3))
  4. The input impedance at pin 3 is infinite.
  5. Regarding NF, component noise parameters (NFmin, Rn, Sopt) are related to NF by setting NFmin=NF, Sopt=0, and Rn=max( ZRef/4 × (10NF/10-1), tinyreal), where tinyreal is an internal simulator value for the smallest real value allowed.
  6. Regarding SOI and TOI, AGC_Amp must be output-matched in order to validate SOI and TOI.
    By default, SOI and TOI are blank resulting in no nonlinearity. TOI can be set without setting SOI; if SOI is set, TOI must be set.
    For more information about SOI and TOI, refer to Amplifier2 documentation.
  7. AGC_Amp is required for defining AGC control loops in designs to be simulated with Budget Controller. Such Budget simulation requires AGC_PwrControl; refer to AGC_PwrControl for AGC control loop usage details.
  8. Example designs demonstrating AGC_Amp in AGC control loops are located in ADS; access the designs from the ADS Main window: File > Example Project > Tutorial > RF_Budget_Examples_prj ; see Budget_AGC.dsn and AGC_loop_CE_test.dsn .
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