SystemVue 2011.03 Release Notes
SystemVue 2011.03 is a platform-oriented release, connecting to Enterprise ESL and RFIC design flows, while also adding several new PHY reference libraries.
SystemVue 2011.03 SP1 is the service pack release for SystemVue 2011.03, follow the #SystemVue 2011.03 SP1 Release Notes for details.
SystemVue-GoldenGate Cosimulation and GoldenGate Fast Circuit Envelope
- Support SystemVue-GoldenGate cosimulation using the new GoldenGateCosim model. This feature enables SystemVue users to cosimulate their system-level designs with RF circuits using GoldenGate Envelope Transient simulator. Refer to GoldenGateCosim for more details.
- Support GoldenGate Fast Circuit Envelope files using the new FastCircuitEnvelope model. This feature allows SystemVue users to use the Fast Circuit Envelope files extracted from RF circuits in GoldenGate. Refer to FastCircuitEnvelope for more details.
SystemVue Catapult C Flow
- The SystemVue Flow for Catapult C auto-generates a SystemVue model from Mentor Graphics' Catapult C TM . This flow provides algorithmic verification of C/C++ algorithms written for Synthesis in Catapult C. Refer to Catapult C Flow documentation for more details.
- The design configurations open new possibilities for working at different levels of design abstraction using the same top level design.
- Using configurations, users can override the model used by a part with any other model in that part's Manage Models list during an Analysis or Code Generation.
- Refer to Design Configurations documentation for more details.
- Following examples can be used to understand the concepts:
- <SystemVue Installation Directory>\Examples\Model Building\Agilent_logo_modulation.wsv
- <SystemVue Installation Directory>\Examples\Model Building\CIC_filter.wsv
- <SystemVue Installation Directory>\Examples\Hardware Design\ConceptToImplementation\ConceptToImplementation_Mapper.wsv
- support multiple I/O RF designs
In previous SystemVue releases, when a Spectrasys design was dropped into a Data Flow schematic, a single-input/single-output part would be placed, and the user was required to select which ports would be used as the input and the output. In the 2011.03 SystemVue release, when a Spectrasys design is dropped into a Data Flow schematic, the placed part displays all the ports of the RF design, and the user can connect to any of them. At least one input port and one output port must be connected. This change results in some backward/forward compatibility issues as explained in the Known Issues section.
- include oscillator phase noise from the RF design
In previous SystemVue releases, oscillator phase noise in the RF design was ignored during the RF_Link simulation. In the 2011.03 SystemVue release, oscillator phase noise in the RF design is taken into account during the RF_Link simulation. Note that carrier noise includes both amplitude and phase noise. Amplitude noise is still ignored during RF_Link simulations.
RF multi-tone simulator Improvements
A Volterra simulation mode was added to Circuit_Link model of RF Spectrasys simulator. It is enabled if input of the Circuit_Link part has > 1 carrier frequency, and its parameter *Max number of fundamental tones = 1.
In this case, Circuit_Link runs 1-tone HB analysis, extracts Volterra model multi-dimensional transfer functions (MTF) using the output spectrums found from HB analysis, and expands the Volterra model to the number of input carriers using extracted MTF.
The current memoryless characterization works for wideband systems only. However, the accuracy of all harmonics and fundamentals may be improved by running 1-tone HB-analysis for each carrier not used in the Volterra model characterization (see Volterra analysis parameter Improve Small Signal Tones Harmonic Accuracy)
- Allows to predict n-tone spectrum when no characterization data is available for intermodulation products
- Expands dynamic band of X-parameters model to higher power
- Is very fast analysis for multi-carrier inputs
- Independently calculates all spectral components at the same frequency
- Does not have restrictions on carrier frequencies harmonic relations, which are present in HB simulation
Spectrasys Zero IF
- Spectrasys now supports Zero IF architecture. In Zero IF architecture, the local oscillator and input carrier frequencies are identical and the modulation information is directly converted to baseband.
- Zero IF receiver model RF_ZIF_Rx is provided for modeling entire zero IF receiver architecture.
- Refer to Zero IF for more details.
- Improved Table Mixer UI that allows easy entry of intermodulation product levels
- Advanced mixer parameters that allow
- generation of sum or difference products only
- mixer image self noise scaling
Instrument Links Improvements
- VSA Sink and Source parts now support VSA 89600B
- Refer to VSA 89600B Sink Part, VSA 89600B Source Part, VSA 89600B MIMO Sink Part, and VSA 89600B MIMO Source Part for more details.
- Note that each part now supports two models: the 89600 model (for VSA 12 and earlier) and the 89600B model (for VSA 13.1). By default, the 89600B model is used (use the "Model" drop down menu in the part dialog to select the 89600 model).
- For the known issue when both VSA 12 and VSA 13.1 are installed on the same machine see the Known Issues section.
- Support for Agilent 81180A Arbitrary Waveform Generator for Ultra Wide Bandwidth Applications
- Using 81180 Signal Downloader Part, you can directly download and playback waveforms using Agilent 81180A for wide band applications (e.g. Radar) that require GHz sampling rates.
- Support for Agilent Modular Product M933xA Arbitrary Waveform Generator for Ultra Wide Bandwidth Applications
- Using M933xA Signal Downloader Part, you can download waveforms to Agilent modular product M933x for wide band applications (e.g. Radar).
SystemVue Error Report Utility
- When SystemVue exits unexpectedly, you can choose to send an Error Report to SystemVue development team to help with the investigation of what caused the error.
- This Error Report does NOT contain any details about your workspace or design.
- Providing a contact email would help us get additional details (e.g. the workspace/design and/or the steps that caused the error) from you about the problem you encountered and will further facilitate its investigation and resolution.
- A side benefit for developers of custom C++ models who use Microsoft Visual Studio is that the SystemVue Error Report dialog can point them to the line of their C++ code that caused the unexpected error if the error is indeed caused by the custom model.
Filter Designer Update
- Support multiple data types for the filter simulation model: floating point, fixed point, complex and envelope.
- Support fixed point filter design capability: word length, integer word length, quantization mode, and overflow mode.
- Refer to About the DSP Filter Designer for more details.
SystemVue ADS Cosimulation
- SystemVue-ADS cosimulation now supports ADS2011.01. Refer to ADSCosimBlock and ADSCosimSink for more details.
Optional Libraries Improvements
- W1918 LTE-Advanced baseband verification library
- Support Carrier Aggregation, including both contiguous and non-contiguous carrier aggregation
- Support higher order downlink MIMO
- Support port 7~14 UE specific reference signals
- Support uplink MIMO
- Support cluster SC-FDMA in uplink
- Support simultaneous PUCCH and PUSCH transmission
- W1916 3G Baseband Verification Library
- New reference blockset for 3G CDMA2000, WCDMA and HSUPA standards
- New reference blockset for CDMA standard
- W1917 WLAN Baseband Verification Library
- New reference blockset for 802.11a wireless LAN
- New reference source for 802.11ac wireless LAN
- Free Custom OFDM personality
- Support to generate standard uncoded OFDM waveforms (such as 802.11a/n, DVB-T2/C2, MoCA, 802.11ac/ad, 802.16d/16e and etc)
- Support to generate custom OFDM waveforms for military communications (such as WNW and etc)
- Support to generate CE-OFDM waveform (constant envelop OFDM)
Upgrades to Existing Products
- W1910 LTE baseband verification library
- Support LTE High Speed Train (HST) channel
- W1905 Radar model library
- Support Digital Array Radar (DAR)
- W1914 DVB-x2 baseband verification library
- New reference blockset for ISDB-T standard
- W1715 MIMO channel builder
- Support LTE Advanced MIMO channel
- W1716 digital pre-distortion builder
- Support iterative DPD
- Support AM-PM curve
- Support DPD for LTE Advanced and multi-carrier GSM
- Support to do PA modeling by using PA input and output waveform
- Support to do DPD for LTE-A signal and LTE-A carrier aggregation signal (up to 100mHz)
Unloading Optional Libraries
- Optional libraries can now be unloaded using the Library Manager. Unloading optional libraries can significantly reduce the start-up memory footprint. The libraries can always be loaded back again using the Library Manager.
- The model path ambiguity has been resolved. In previous releases, when you place down a subnetwork part on schematic (e.g., LTE_DL_Src@LTE 8.9 Models) and right click -> Open -> Model/Subcircuit, a copied version of the subnetwork model (LTE_DL_Src) is added in the workspace tree, and it replaces the library version (LTE_DL_Src@LTE 8.9 Models) during simulation, even though the Model entry in the part properties dialog is still specified as LTE_DL_Src@LTE 8.9 Models. Starting from this release, SystemVue will always use the model with the full library path for simulation. If you want to use the copied version instead (LTE_DL_Src in the workspace tree), you need to remove the library path (@LTE 8.9 Models) from the Model entry in the part properties dialog.
Licensing Issues With Microsoft Windows Standby, Sleep and Hibernate Modes
Standby, sleep and hibernate modes in Windows are not supported and licensing may fail on wake up. This is a known restriction with FLEXlm. You may want to disable these modes. If licensing fails on wake up, you can:
- Restart the "EEsof EDA License Server" service.
- Run the SystemVue License Wizard.
- Reboot the PC if both of the above listed options fail.
Issue with VSA 12 (or earlier) and VSA 13.1 installed on the same machine.
Simulation with VSA 12 (or earlier) simultaneously with VSA 13.1's running on the same machine is not supported and doing so will result in an error. So before running simulation with VSA 12 (or earlier), make sure to close VSA 13.1's started from SystemVue through SystemVue's menu Action -> Exit Vector Signal Analyzer (89600 VSA), and to manually close those started outside of SystemVue.
Use "Y versus X" graphs to plot calculated data against an independent variable
If a "General" graph series does not plot data against the desired independent variable, use a "Y versus X" plot to specify values for both axes.
SystemVue hangs when tuning is performed during an RF_Link simulation
SystemVue may hang when moving a slider to tune a variable during an RF_Link simulation. To avoid this problem wait until the previous simulation is complete and then move the slider to tune the variable of interest.
Issue with Windows 7 file writing permission
If you install SystemVue in the default directory on Windows 7 and run examples direcly, examples that require file writing operations may generate error messages due to the write permission under C:\Program Files. If this happen, you can copy the examples outside the restricted directory.
If any of the paths through the RF design from any connected input to any connected output includes any of the models VarAmp, VarAmp1V, or ATTN_Ctrl an internal error is reported and the simulation terminates.
RF_Link Backward/Forward Compatibility.
Due to enhancements made to the RF_Link model (see Improvements to the Core Platform (W1461)), when an old (created using SystemVue 2010.07 or earlier) schematic design using RF_Link is opened in SystemVue 2011.03, the associated part will be disconnected. Simply double-click on the part and click OK to add pins to it. If the RF design had only one input and one output, no further work is needed. If the RF design had more than one input or more than one output, you will most likely have to reconnect the ports of the RF_Link part to the correct wires. See the examples below.
In SystemVue releases prior to 2011.03, the RF_Link model could only simulate one input and one output Spectrasys RF designs. If a design created in SystemVue 2011.03 and using RF_Link is opened in a previous release, the RF_Link part will show as a single-input/single-output part, and it will have to be properly connected to the rest of the system. In addition, the InputPartName and OutputPartName parameters will need to be set properly to select the one input port and one output port that the model can support.
SystemVue 2011.03 SP1 Release Notes
- Support AMI code generation for crosstalk channels.
- Support FFT HDL code generation.
- Improve stability in various areas, including schematic connectivity, schematic tooltips, tuning using sliders, equations, and VSA.
- Improve stability in LTE, LTE-A, DPD, ISDBT, WiMax, and FlexOFDM.
- Improve stability in using large X parameter files.
- Resolve some C++ code generation limitations, including support for switch statement in subnetwork equation page.
- Support C++ code generation for mapper and demapper.
- Support user-defined polynomials in GoldCode.
- Support harmonic distortion and jitter in DtoA model.