WCDMA3G_UpLkScrambler
Description: Uplink scrambling code generator
Library: 3GPPFDD 1099, Spreading & Modulation
Class: SDFWCDMA3G_UpLkScrambler
Parameters
Name 
Description 
Default 
Type 
Range 

ChipRate 
chip rate of the system: Chip Rate 3.84M 
Chip Rate 3.84M 
enum 

CodeType 
type of scrambling code: Long_Scrambling_Code, Short_Scrambling_Code 
Long_Scrambling_Code 
enum 

Index 
index of scrambling code 
1 
int 
[0, 16777215] 
Pin Outputs
Pin 
Name 
Description 
Signal Type 

1 
out 
scrambling code 
complex 
2 
INDEX 
scrambling code index 
int 
Notes/Equations
 This model is used to generate uplink transmission scrambling codes. The index of this sequence is also conveyed. Each firing, a cycle of tokens is produced in out and one is produced in INDEX.
 The scrambling codes are divided into short and long codes. Uplink channels use long or short code. Both scrambling code sequences are constructed by combining two real sequences into a complex sequence. The long code cycle is 38400, the short code cycle is 256.
 Scrambling codes are formed as follows.
where
In a long scrambling code, the c 1 and c 2 sequences are constructed as the modulo 2 sum of 38400 chip segments of two binary msequences generated by two 25degree generator polynomials.w 0 and w 1 are chip rate sequences defined as repetitions of
w 0={1 1}, w 1={1−1}.
c 1 is a real chip rate code
c 2' is a decimated version with a decimation factor2 of real chip rate code c_{2}
The primitive polynomial for x sequence is .
The primitive polynomial for y sequence is .
The long code sequence generator configuration is shown in the following figure.
The initial value of shift register 1 is the index binary, while the initial values of shift register 2 are all −1. Because the uplink scrambling code is defined as a cycle of 38400 [1]; the shortened Gold sequence generator exports chips in a 38400 radio frame duration and phase 0 to 38400 radio frames are repeated. The sequence phase is shifted by an amount 16777232 between c 1 and c 2.
Uplink Long Scrambling Code Generator
In a short scrambling code, codes lengths of 256 chips are obtained by one chip periodic extension of 255 sequences; the first and last chips of any uplink short scrambling code are the same. The 255length sequence is obtained by modulo 4 addition of three sequences:
Sequences a(n), b(n) and c(n) are constructed by the recursive generator defined by the polynomial g 0 (x), g 1 (x) and g 2 (x).n = 0, 1, 2, ..., 254
The short code sequence generator configuration is shown in the following figure.
Sequence z v (n) is mapped to a complex sequence S v (n) by the mapping function given in the following table. Re{S_{v} (n)} and Im{S_{v} (n)} are binary sequences c 1 and c 2.z_{v}(n) and S_{v}(n) Mapping
The initial states for the G 1 and G 2 are the two 8bit words representing index s and t in the 24bit binary representation of scrambling code index v. The initial state of G 0 is obtained after the transformation of 8bit word representing index r . The transformation is:z v (n)
S v (n)
0
+1+1j
1
1+1j
2
11j
3
+11j
,
, n=1, ..., 7.
Uplink Short Scrambling Code Generator
The initial states of three generators are shown in the following figure.
Uplink Short Scrambling Code Generator
State Initialization
References
 3GPP Technical Specification, TS 25.213, V3.0.0, "Spreading and modulation (FDD)," October 1999.