Page tree
Skip to end of metadata
Go to start of metadata


WCDMA3G_TestModel_Delay


Description: W-CDMA 3GPP delay DPCH group for BS test models
Library: 3GPPFDD 10-99, Test Model
Class: SDFWCDMA3G_TestModel_Delay

Parameters

Name

Description

Default

Sym

Type

Range

TestModelType

type of test model for base station: TestModel1, TestModel2, TestModel3

TestModel1

 

enum

 

DPCHNum

number of DPCHs in test model for base station

16

N

int

{3, 16,32,64}

Pin Inputs

Pin

Name

Description

Signal Type

1

in

input DPCH data

multiple complex

Pin Outputs

Pin

Name

Description

Signal Type

2

out

output DPCH data after delay

multiple complex

Notes/Equations
  1. This model is used to delay a group of DPCHs Nd chips.
    Each firing, 2560 tokens of each port of out are produced when 2560 tokens of in are consumed. Port in and out are both multiple ports, their port numbers are N according to DPCHNum.
    The relationship of each DPCH spreading code index and its delay is given in the following tables for Test Model 1, Test Model 2 and Test Model 3, respectively. Each DPCH is delayed Nd chips.
    Delay of DPCHs for Test Model 1
    DPCH Spreading Code Index DPCH Delay (256 chips) (Nd)
    N=16 N=32 N=64
    2 86 86 86
    11 134 134 134
    17 52 52 52
    23 45 45 45
    31 143 143 143
    38 112 112 112
    47 59 59 59
    55 23 23 23
    62 1 1 1
    69 88 88 88
    78 30 30 30
    85 18 18 18
    94 30 30 30
    102 61 61 61
    113 128 128 128
    119 143 143 143
    7   83 83
    13   25 25
    20   103 103
    27   97 97
    35   56 56
    41   104 104
    51   51 51
    58   26 26
    64   137 137
    74   65 65
    82   37 37
    88   125 125
    97   149 149
    108   123 123
    117   83 83
    125   5 5
    4     91
    9     7
    12     32
    14     21
    19     29
    22     59
    26     22
    28     138
    34     31
    36     17
    40     9
    44     69
    49     49
    53     20
    56     57
    61     121
    63     127
    66     114
    71     100
    76     76
    80     141
    84     82
    87     64
    91     149
    95     87
    99     98
    105     46
    110     37
    116     87
    118     149
    122     85
    126     69

    Delay of DPCHs for Test Model 2

    DPCH Spreading

    DPCH Delay (*256 chips) (Nd) N=3

    24

    1

    71

    7

    120

    2


    Delay of DPCHs for Test Model 3
    DPCH Spreading Code Index DPCH delay (256 chips)
    N=16 N=32
    64 86 86
    69 134 134
    74 52 52
    78 45 45
    83 143 143
    89 112 112
    93 59 59
    96 23 23
    100 1 1
    105 88 88
    109 30 30
    111 18 18
    115 30 30
    118 61 61
    122 128 128
    125 143 143
    67   83
    71   25
    76   103
    81   97
    86   56
    90   104
    95   51
    98   26
    103   137
    108   65
    110   37
    112   125
    117   149
    119   123
    123   83
    126   5

References
  1. 3GPP Technical Specification TS 25.141 V3.3.0, "Base station conformance testing (FDD)," September 2000.
  • No labels