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WCDMA3G_TC_Intlvr


Description: Turbo code internal interleaver
Library: 3GPPFDD 10-99, Channel Coding
Class: SDFWCDMA3G_TC_Intlvr

Parameters

Name

Description

Default

Type

LinkDir

link direction: Downlink, Uplink

Downlink

enum

TrCHType

transport channel type: DCH_8_kbps, DCH_16_kbps, DCH_32_kbps, DCH_64_kbps, DCH_128_kbps, DCH_256_kbps, DCH_512_kbps, DMCH_2_4_kbps, DMCH_12_2_kbps, DMCH_64_kbps, DMCH_144_kbps, DMCH_384_kbps, DMCH_2048_kbps, BCH_11_1_kbps, BCH_12_3_kbps

DCH_64_kbps

enum

TTI

transmission time interval: TTI_10ms, TTI_20ms, TTI_40ms, TTI_80ms

TTI_10ms

enum

Pin Inputs

Pin

Name

Description

Signal Type

1

In

input data

int

2

CurSize

input data size

int

Pin Outputs

Pin

Name

Description

Signal Type

3

Out

ouput data after interleaving

int

Notes/Equations
  1. This model is used to implement turbo code internal interleaving.
    The turbo code internal interleaving consists of mother interleaver generation and pruning, as illustrated in the following figure. The interleaver is fired in a code block that is segmented by the former model.

    Turbo Coding with Internal Interleaver
    Coding schemes are listed in the following table.
    Turbo Coding Schemes

    TrCHType

    LinkDir

    CodeType

    Coding Scheme

    DCH_8_kbps

    any

    k 4 g1 013 g2 015 Rate One Third

    zero output

    DCH_16_kbps

    any

    k 4 g1 013 g2 015 Rate One Third

    zero output

    DCH_32_kbps

    any

    k 4 g1 013 g2 015 Rate One Third

    zero output

    DCH_64_kbps

    any

    k 4 g1 013 g2 015 Rate One Third

    rate 1/3 coding

    DCH_128_kbps

    any

    k 4 g1 013 g2 015 Rate One Third

    rate 1/3 coding

    DCH_256_kbps

    any

    k 4 g1 013 g2 015 Rate One Third

    rate 1/3 coding

    DCH_512_kbps

    any

    k 4 g1 013 g2 015 Rate One Third

    rate 1/3 coding

    DMCH_2_4_kpbs

    any

    k 4 g1 013 g2 015 Rate One Third

    zero output

    DMCH_12_2_kpbs

    any

    k 4 g1 013 g2 015 Rate One Third

    zero output

    DMCH_64_kbps

    any

    k 4 g1 013 g2 015 Rate One Third

    rate 1/3 coding

    DMCH_144_kbps

    any

    k 4 g1 013 g2 015 Rate One Third

    rate 1/3 coding

    DMCH_384_kbps

    any

    k 4 g1 013 g2 015 Rate One Third

    rate 1/3 coding

    DMCH_2048_kbps

    Uplink

    k 4 g1 013 g2 015 Rate One Third

    rate 1/3 coding

    BCH_11_1_kbps

    Downlink

    k 4 g1 013 g2 015 Rate One Third

    zero output

    BCH_12_3_kbps

    Downlink

    k 4 g1 013 g2 015 Rate One Third

    zero output


    Input token and output tokens are listed in the following table.
    Input and Output Tokens
    DCHType (Uplink or Downlink) TTI In Tokens inSize Tokens Out Tokens
    DCH_64_kbps 10 ms 656 1 656
    20 ms 1296 1 1296
    40 ms 2576 1 2576
    80 ms 2568 1 2568
    DCH_128_kbps 10 ms 1296 1 1296
    20 ms 2576 1 2576
    40 ms 2568 1 2568
    80 ms 3419 1 3419
    DCH_256_kbps 10 ms 2576 1 2576
    20 ms 2568 1 2568
    40 ms 3419 1 3419
    80 ms 4100 1 4100
    DCH_512_kbps 10 ms 2568 1 2568
    20 ms 3419 1 3419
    40 ms 4100 1 4100
    80 ms 4553 1 4553
    DMCH_64_kbps 20 ms 1296 1 1296
    DMCH_144_kbps 20 ms 2896 1 2896
    DMCH_384_kbps 20 ms 3848 1 3848
    DMCH_384_kbps (uplink only) 20 ms 4553 1 4553
  2. Model functions
    Input bits and data length are read from the input buffer. Input bits from the beginning to the input data length are valid data for turbo code internal interleaving.
    Interleaving consists of three stages:
    • input sequence is written into the rectangular matrix row by row
    • intra-row permutation
    • inter-row permutation
    The three-stage permutations are described here; input block length is assumed to be K(320 to 5114 bits).
    First Stage
    Determine row number R such that
    • R = 10 ( K = 481 to 530 bits ) Case 1
    • R = 20 ( K = any other block length except 481 to 530 bits) Case 2
    Determine column number C such that
    • Case 1: C = p = 53
    • Case-2:
      find minimum prime p such that
      0 ≤ (p + 1) − K/R
      if ( 0 ≤ p − K/R ) then go to the next if, else
      C = (p + 1)
      if ( 0 ≤ p − 1− K/R ) then C = (p − 1), else
      C = p
    The input sequence of the interleaver is written into the R × C rectangular matrix row by row.
    Second Stage
    If C = p
    Select a primitive root g0 (see the following table).
    Construct the base sequence c(i) for intra-row permutation as:

    c(i) = [ g0 × c(i-1) ] mod p, i = 1, 2, ..., (p − 2), c(0) = 1

    Select the minimum prime integer set {qj } such that

    g.c.d. { qj, p − 1 } = 1
    qj > 6
    qj > q(j-1)

    where g.c.d is the greatest common divider. And q0 = 1.
    The set {qj } is permuted to make a new set {pj } such that

    pP(j) = qj, j = 1, 2, ..., R − 1

    where P(j) is the inter-row permutation pattern defined in the third stage.
    Perform the jth (j = 0, 1, 2, ..., R − 1) intra-row permutation as:

    cj (i) = c([ i × pj ] mod (p − 1)), i = 1, 2, ..., (p − 2), cj(p − 1) = 0,

    where cj (i) is the input bit position of ith output after permutation of jth row.
    Prime p and Associated Primitive Root

    p

    g0

    p

    g0

    p

    g0

    p

    g0

    p

    g0

    17

    3

    59

    2

    103

    5

    157

    5

    211

    2

    19

    2

    61

    2

    107

    2

    163

    2

    223

    3

    23

    5

    67

    2

    109

    6

    167

    5

    227

    2

    29

    2

    71

    7

    113

    3

    173

    2

    229

    6

    31

    3

    73

    5

    127

    3

    179

    2

    233

    3

    37

    2

    79

    3

    131

    2

    181

    2

    239

    7

    41

    6

    83

    2

    137

    3

    191

    19

    241

    7

    43

    3

    89

    3

    139

    2

    193

    5

    251

    6

    47

    5

    97

    5

    149

    2

    197

    2

    257

    3

    53

    2

    101

    2

    151

    6

    199

    3

     

     

    If C = p +1
    Select a primitive root g0 (see the previous table).
    Construct the base sequence c(i) for intra-row permutation as:

    c(i) = [ g0 × c(i − 1) ] mod p, i = 1, 2, ..., (p − 2), c(0) = 1

    Select the minimum prime integer set {qj } such that

    g.c.d. { qj, p − 1 } = 1
    qj > 6
    qj > q(j-1)

    where g.c.d is the greatest common divider. And q0 = 1.
    The set {qj } is permuted to make a new set {pj } such that

    pP(j) = qj, j = 1, 2, ..., R − 1

    where P(j) is the inter-row permutation pattern defined in the third stage.
    Perform the jth (j = 0, 1, 2, ..., R − 1) intra-row permutation as:

    cj (i) = c([ i × pj ] mod (p − 1)), i = 1, 2, ..., (p − 2), cj (p − 1) = 0 and cj (p) = p,

    If ( K= C × R ) then exchange cR-1(p) and cR-1(0)
    where cj (i) is the input bit position of ith output after permutation of jth row.
    If C = p - 1
    Select a primitive root g0 (see the previous table).
    Construct the base sequence c(i) for intra-row permutation as:

    c(i) = [ g0 x c(i − 1) ] mod p, i = 1, 2, ..., ( p − 2), c(0) = 1

    Select the minimum prime integer set {qj } such that

    g.c.d. {qj, p − 1 } = 1
    qj > 6
    qj > q(j-1)

    where g.c.d is the greatest common divider. And q0 = 1.
    The set {qj } is permuted to make a new set {pj } such that

    pP(j) = qj, j = 1, 2, ..., R − 1

    where P(j) is the inter-row permutation pattern defined in the third stage.
    Perform the jth (j = 0, 1, 2, ..., R − 1) intra-row permutation as:

    cj (i) = c([ i × pj ] mod (p − 1)) - 1, i = 1, 2, ..., (p − 2),

    where cj (i) is the input bit position of ith output after permutation of jth row.
    Third Stage
    Perform inter-row permutation based on the following P(j) (j = 0, 1, 2, ..., R − 1), where P(j) is the original row position of the jth permuted row.

    PA: {19,9,14,4,0,2,5,7,12,18,10,8,13,17,3,1,16,6,15,11} for R = 20
    PB: {19,9,14,4,0,2,5,7,12,18,16,13,17,15,3,1,6,11,8,10} for R = 20
    PC: {9,8,7,6,5,4,3,2,1,0} for R = 10

    Pattern usage is as follows:

    Block length K: P(j)
    320 to 480 bits: PA
    481 to 530 bits: PC
    531 to 2280 bits: PA
    2281 to 2480 bits: PB
    2481 to 3160 bits: PA
    3161 to 3210 bits: PB
    3211 to 5114 bits: PA

    The output of the mother interleaver is the sequence read out column-by-column from the permuted R × C matrix.
    The output of the mother interleaver is pruned by deleting l-bits in order to adjust the mother interleaver to block length K, where the deleted bits are non-existent bits in the input sequence. The pruning bits number l is defined as:

    l = R × C − K,

    where R is the row number and C is the column number.
    Data is output after interleaving and all-zero padded if the valid length is smaller than the buffer size.

References
  1. 3GPP Technical Specification TS25.212 V3.0.0, "Multiplexing and Channel Coding (FDD)," October 1999.
  2. 3GPP Technical Specification TS25.101 V3.0.0, "UE Radio transmission and Reception (FDD)," October 1999.
  3. 3GPP Technical Specification TS25.104 V3.0.0, "UTRA(BS) FDD: transmission and Reception," October 1999.
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