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WCDMA3G_CodeDomainPwr



Description: Code Domain Power measurement
Library: 3GPPFDD, Measurement
Class: SDFWCDMA3G_CodeDomainPwr

Parameters

Name

Description

Default

Unit

Type

Range

SampleRate

sample rate per chip

8

 

int

[1:32]

StartSlot

number of slot to be ignored

0

 

int

[0, ∞)

MaxDelay

maximum search delay in terms of chip number

0

 

int

[0:1280]

ScrambleType

scramble code type: UL_long, UL_short, DL

UL_long

 

enum

 

ScrambleCode

index of scramble code

0

 

int

[0:8191] for downlink;
[0:16777215] for uplink

SF

spreading factor

256

 

int

[2:512]

Pin Inputs

Pin

Name

Description

Signal Type

1

in

input data

complex

Notes/Equations
  1. This subnetwork model measures code domain power. The schematic for this subnetwork is shown in the following figure.

    WCDMA3G_CodeDomainPwr Schematic
  2. Code domain power is the distribution of signal energy on the set of orthogonal code channels, normalized by the total signal energy. Because the set of orthogonal codes is complete, all signal energy projects on the set of code-channels (whether or not the signal has an error).
    In general the vector (Z) of samples of the received, descrambled chip stream can be regarded as comprising M × N samples, where N is the number of symbol periods in the measurement interval and M is the spreading factor (M chips per symbol, with one sample per chip). The measurement interval is one time slot. Within this constraint it is evident that the values of N and M depend on which layer of the OVSF code tree is being evaluated.
    Code domain power is always calculated at the C(8) layer regardless of the actual traffic mix, so M=256. (A measurement interval of time slot N, in principle, should equal 10 (15 kilosymbols per second).) This is legitimate because the power attributable to a physical channel using a higher rate spreading code will correlate with the block of K adjacent codes at the level for which the higher rate code is the parent. (K is also the ratio between the used spreading code rate and 15 kilosymbols per second). Provided that all the codes in this block are identified as used codes then the aggregate power of the K codes in the block will equal the signal power of the higher rate code.
    The code domain power (coefficient) calculation given in the following equation is applied for i Π{0, 1, 2, ... , M - 1} to generate a vector of normalized code domain power.

    In this case signal Ri,k = Ci,k + jCi,k and Ci, k is the k th chip of the i th spreading code.
    When the OVSF spreading code set is complete, and all energy must be accounted for, this conclusion is made for the sum of code domain power coefficients equality:

    According to the code domain power equation above, code domain power is calculated as follows:
    • take the descrambled vectors Z
    • take the orthogonal vectors of the channelization code set C (all codes belonging to one spreading factor)
    • calculate the inner product of Z with C. Do this for all symbols of the measurement interval and for all codes in the code space. This gives an array of format N × M, each value representing a specific symbol and a specific code, where
      M = number of codes
      N = number of symbols in the measurement interval
    • calculate M RMS values, each RMS value unifying N symbols within one code.
    • normalize each RMS value to the received signal power.
      The vector of code domain power can be plotted as a histogram, then used to display the power distribution in the code domain.
      The MaxDelay parameter is a user-specified time delay range in terms of chip to be used in signal search. The StartSlot parameter indicates which slot will be measured.
  3. The 3GPP system chip rate is 3.84 Mcps. The BS_Tx_Code_Domain_Power.dsn design demonstrates the use of this subnetwork model in the Examples WCDMA3G/WCDMA3G_BS_Tx_prj; this project is discussed in Base Station Transmitter Design Examples.

References
  1. 3GPP Technical Specification TS 34.121 V3.8.0, Terminal Conformance Specification, Radio Transmission and Reception (FDD), March 2003, Release 1999.

    http://www.3gpp.org/ftp/Specs/2002-03/R1999/34_series/34121-380.zip

  2. 3GPP/TSG R4 #3 (99) 107 "Uplink and Downlink Modulation Accuracy."
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