WCDMA3G_1CHRakeReceiver
Description: Rake receiver, one code channel
Library: 3GPPFDD 10-99, Rake Receiver
Class: SDFWCDMA3G_1CHRakeReceiver
Parameters
| Name | Description | Default | Sym | Type | Range |
|---|---|---|---|---|---|
| ChipRate | chip rate of system: Chip Rate 3.84Mcps | Chip Rate 3.84Mcps | enum | ||
| LinkDir | link direction: Downlink, Uplink | Downlink | enum | ||
| DL_DPCHType | downlink dedicated physical channel: DPCH_15kbps_TF0_T2_P4, DPCH_15kbps_TF2_T2_P4, DPCH_30kbps_TF0_T2_P2, DPCH_30kbps_TF2_T2_P2, DPCH_30kbps_TF0_T2_P4, DPCH_30kbps_TF2_T2_P4, DPCH_30kbps_TF0_T2_P8, DPCH_30kbps_TF2_T2_P8, DPCH_60kbps_TF0_T2_P4, DPCH_60kbps_TF2_T2_P4, DPCH_60kbps_TF0_T2_P8, DPCH_60kbps_TF2_T2_P8, DPCH_120kbps_TF8_T4_P8, DPCH_120kbps_TF0_T4_P8, DPCH_240kbps_TF8_T4_P8, DPCH_240kbps_TF0_T4_P8, DPCH_480kbps_TF8_T8_P16, DPCH_480kbps_TF0_T8_P16, DPCH_960kbps_TF8_T8_P16, DPCH_960kbps_TF0_T8_P16, DPCH_1920kbps_TF8_T8_P16, DPCH_1920kbps_TF0_T8_P16, PCCPCH | DPCH_30kbps_TF2_T2_P8 | enum | † | |
| UL_DPDCHType | uplink dedicated physical data channel: DPDCH_15kbps, DPDCH_30kbps, DPDCH_60kbps, DPDCH_120kbps, DPDCH_240kbps, DPDCH_480kbps, DPDCH_960kbps | DPDCH_30kbps | enum | ||
| UL_DPCCHType | uplink dedicated physical control channel: DPCCH_15kbps_P6_TF2_F0_T2, DPCCH_15kbps_P8_TF0_F0_T2, DPCCH_15kbps_P5_TF2_F1_T2, DPCCH_15kbps_P7_TF0_F1_T2, DPCCH_15kbps_P6_TF0_F2_T2, DPCCH_15kbps_P5_TF2_F2_T1 | DPCCH_15kbps_P6_TF2_F0_T2 | enum | † | |
| DL_TXDiversity | transmitting diversity in downlink: No_Diversity, DL_STTD | No_Diversity | enum | ||
| SampleRate | number of samples per chip | 4 | S | int | [1, 32]] |
| PathNum | number of paths or fingers of Rake | 6 | L | int | [1, 16]] |
| MaxDelay | maximum path delay in terms of chips | 40 | D | int | [0, no. of half chips of one slot]] |
| SearchDir | search path direction based on current timing: Forward, Backward, Bidirection | Backward | enum | ||
| EstMethod | estimation method based on DPCH: Averaging, Interpolation, WMSA, NoEst | Interpolation | enum | ||
| WMSASlotNum | number of slots for WMSA method | 1 | K | int | [1, 8]] |
| WFactors | factors of weighting used in WMSA method | 1.0 1.0 | real array | (0, 1] | |
| † where TFn = number of transmit format indicator bits Tn = number of transmit power control bits Pn = number of pilot bits Fn = number of feedback indicator bits |
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Pin Inputs
Pin |
Name |
Description |
Signal Type |
|---|---|---|---|
1 |
SmpSig |
received baseband complex envelope signal samples |
complex |
2 |
SprdCd |
bit-wise product of spreading and scrambling codes for DPCHs |
complex |
Pin Outputs
Pin |
Name |
Description |
Signal Type |
|---|---|---|---|
3 |
CH1 |
combined signals of the first code channel |
complex |
Notes/Equations
- This subnetwork is used to implement coherent Rake receiver with maximal ratio combining on one code channel.
Each firing, S × T tokens are consumed at SmpSig, and T tokens are consumed at SprdCd, where T is the number of chips per slot; N tokens are produced at CH1 where N is the number of symbols per slot. The output at CH1 is delayed by one frame because of Rake receiver signal processing. The complex format of input at SprdCd is Cspread × (Cscramble,i + j × Cscramble,q). - The schematic for this subnetwork is shown in the following figure.
WCDMA3G_1CHRakeReceiver Schematic
References
- 3GPP Technical Specification TS25.211 V3.0.0, "Physical channels and mapping of transport channels onto physical channels (FDD)," October 1999.
- 3GPP Technical Specification TS25.213 V3.0.0, "Spreading and modulation (FDD)," October 1999.
- A. J. Viterbi, "CDMA: Principles of Spread Spectrum Communication," Wesley Publishing Company, 1995.