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User Equipment Transmitter Design Examples

Introduction

The WCDMA3G_UE_Tx_prj project demonstrates user equipment transmitter measurement characteristics. These measurements include maximum power, occupied bandwidth, complementary cumulative distribution function (CCDF), spectrum emission, adjacent channel leakage power ratio (ACLR), error vector magnitude (EVM), peak code domain error, code domain power, and spurious emission.

The uplink frequency is set to 1950 MHz.

Designs for these measurements are described in the following sections; these include:

  • Maximum power measurements: UE_Tx_Max_Power.dsn
  • Occupied bandwidth measurements: UE_Tx_Occupied_BW.dsn
  • CCDF and peak-to-mean information measurements: UE_Tx_CCDF.dsn
  • Spectrum emission measurements: UE_Tx_Spec_Emissions.dsn
  • Adjacent channel leakage power ratio measurements: UE_Tx_ACLR.dsn and UE_Tx_ACLR_SwitchingTransients.dsn
  • Error vector magnitude measurements: UE_Tx_EVM.dsn
  • Peak code domain error measurements: UE_Tx_Pk_Code_Error.dsn
  • Signal power distribution measurements in code domain: UE_Tx_Code_Domain_Power.dsn
  • Spurious emission measurement: UE_Tx_SpurEmission.dsn

Common variables used in these designs are listed in the following table.

VAR Parameters

Parameter Name

Description

Default Value

SpecVersion

Specification version

2

RefCh

Reference measurement channel

0

SamplePerChip

Samples per chip

8

TStep

Time step

1/(3840000 × SamplesPerChip)

FilterLength

Filter length in terms of samples

16

FCarrier

RF carrier frequency

1950 (MHz)

SourceR

Source resistance

50 (ohm)

SourceDelay

Source delay

(2 × int(FilterLength × SamplesPerChip/2)+1) × TStep

3GPPFDD_RF_Uplink is used to provide a RF 3GPPFDD uplink signal source; the schematic for this subnetwork is shown in the following figure; parameters are listed in the following table.

The 12.2 kbps uplink reference measurement channel is used in all transmitter measurements except peak code domain error measurement where the 768 kbps UL reference measurement channel is used.

3GPPFDD_RF_Uplink Schematic


3GPPFDD_RF_Uplink Parameters

Name

Description

Value Range

SpecVersion

version of specifications: Version_03_00, Version_12_00, Version_03_02

 

ROut

output resistance

(0,+∞)

FCarrier

frequency of carrier, in MHz

(0,+∞)

Power

output power, in dBm

(-∞,+∞)

PhasePolarity

if set to Invert, Q channel signal is inverted: Normal, Invert

 

GainImbalance

gain imbalance, I to Q channel, in dB

(-∞,+∞)

PhaseImbalance

phase imbalance, I to Q channel, in degrees

(-∞,+∞)

I_OriginOffset

I origin offset in percent with respect to output rms voltage

(-∞,+∞)

Q_OriginOffset

Q origin offset in percent with respect to output rms voltage

(-∞,+∞)

IQ_Rotation

IQ rotation in degrees

(-∞,+∞)

NDensity

additive noise density in dBm per Hz

(-∞,+∞)

SamplesPerChip

samples per chip

(0,+∞)

ExcessBW

excess bandwidth of raised cosine filters

[0,1]

FilterLength

length of raised cosine filters in number of symbols

(0,+∞)

RefCh

reference measurement channel: UL_REF_12_2, UL_REF_64, UL_REF_144, UL_REF_384_10, UL_REF_384_20, UL_REF_768, UL_REF_2048

 

DPCCH_SltFmt

DPCCH slot format

[0, 5]

ScrambleType

scramble type: Long, Short

integer

ScrambleCode

index of scramble code

[0, 16777215]

GainIndex

gain index

[0, 15]

Maximum Power

UE_Tx_Max_Power.dsn Design

Features
  • 12.2 kbps reference measurement channel
  • maximum power measurement
  • fixed-rate measurement signal source
  • uplink reference measurement channel
  • 40 and 20 msec transmission time intervals
  • 16-bit CRC detection
  • rate 1/3 convolutional coding
  • static rate matching
  • fixed position of transport channel in radio frame
  • BPSK modulation
  • integrated RF components

Description

UE_Tx_Max_Power.dsn measures the maximum power of downlink signal. The schematic shown in the following figure includes signal source, modulator, and maximum power measurement sections.

UE_Tx_Max_Power.dsn Schematic

Carrier frequency is set to 1950 MHz in this design.

3GPPFDD_RF_OutputPower is used to measure output power; the schematic for this subnetwork is shown in the following figure; parameters are listed in the following table.

3GPPFDD_RF_OutputPower Schematic


3GPPFDD_RF_OutputPower Parameters

Name

Description

Value Range

SpecVersion

version of specifications: Version_03_00, Version_12_00, Version_03_02

 

RLoad

input resistance

(0,+∞)

RTemp

temperature of resistor

[-273.15,+∞)

TStep

input time step, in sec

(0,+∞)

FCarrier

frequency of carrier, in MHz

(0,+∞)

SamplesPerChip

samples per chip

(0,+∞)

FilterLength

length of raised cosine filters in number of symbols

(0,+∞)

LinkDir

link direction: Downlink, Uplink

 

ScrambleCode

index of scramble code

[0, 16777215]

ULScrambleType

uplink scramble code type: LONG, SHORT

 

ScrambleOffset

scramble offset in downlink channels

[0, 15]

DLScrambleType

downlink scramble code type: Normal, RightAlternate, LeftAlternate

 

SpreadFactor

spreading factor

{4,8,16,32,64,128,256,512}

SpreadCode

index of spread code

[0,SpreadFactor-1]

StartSlot

number of slot to be ignored

[0,+∞)

SlotNum

number of slots measured

[1,+∞)

SCH

switch for SCH: On, Off

 

CPICH

switch for CPICH: On, Off

 

SearchLength

search length

(0:(400.0/3840000))

SlotBoundary

slot boundary in terms of sample

 

Simulation Results

The following figure shows the performance of maximum output power.

Maximum Power Curve

Benchmark
  • Simulation time is approximately 7 seconds on a P4/2.2G 512M PC powered by MS Windows 2000 and ADS 2003C.

Occupied Bandwidth Measurements

UE_Tx_Occupied_BW.dsn Design

Features
  • 12.2 kbps reference measurement channel
  • occupied bandwidth measurement
  • fixed-rate measurement signal source
  • uplink reference measurement channel
  • 40 and 20 msec transmission time intervals
  • 16-bit CRC detection
  • rate 1/3 convolutional coding
  • static rate matching
  • fixed position of transport channel in radio frame
  • BPSK modulation
  • integrated RF components
  • standard measurement signal source

Description

Occupied bandwidth is a measure of the bandwidth containing 99% of the total integrated power of the transmitted spectrum, centered on the assigned channel frequency. The occupied channel bandwidth must be less than 5 MHz based on a chip rate of 3.84 Mcps.

The signal spectrum is plotted using an FFT model. On the data display sheet, a marker is placed to find the occupied bandwidth specified.

The schematic for this subnetwork is shown in the following figure.

UE_Tx_Occupied_BW.dsn Schematic

3GPPFDD_RF_OccupiedBW is used to measure output power; the schematic for this subnetwork is shown in the following figure; parameters are listed in the following table.

3GPPFDD_RF_OccupiedBW Schematic


3GPPFDD_RF_OccupiedBW Parameters

Name

Description

Value Range

SpecVersion

version of specifications: Version_03_00, Version_12_00, Version_03_02

 

RLoad

input resistance

(0,+∞)

RTemp

temperature of resistor

[-273.15,+∞)

SpecMeasResBW

Spectrum resolution bandwidth

 

SpecMeasWindow

Window type: Hamming 0.54, Hanning 0.50, Gaussian 0.75, Kaiser 7.865, HP8510 6.0, Blackman, Blackman-Harris

 

FCarrier

frequency of carrier, in MHz

(0,+∞)

SamplesPerChip

samples per chip

(0,+∞)

FilterLength

length of raised cosine filters in number of symbols

(0,+∞)

LinkDir

link direction: Downlink, Uplink

 

ScrambleCode

index of scramble code

[0, 16777215]

ULScrambleType

uplink scramble code type: LONG, SHORT

 

ScrambleOffset

scramble offset in downlink channels

[0, 15]

DLScrambleType

downlink scramble code type: Normal, RightAlternate, LeftAlternate

 

SpreadFactor

spreading factor

{4,8,16,32,64,128,256,512}

SpreadCode

index of spread code

[0,SpreadFactor-1]

StartSlot

number of slot to be ignored

[0,+∞)

SlotNum

number of slots measured

[1,+∞)

SCH

switch for SCH: On, Off

 

CPICH

switch for CPICH: On, Off

 

SearchLength

search length

(0:(400.0/3840000))

SlotBoundary

slot boundary in terms of sample

 

SlotFormat

slot format

 

Notes

Set the number of points for FFT transformation so that the resolution of spectrum is high enough to discriminate the bandwidth containing the 99% signal power.

Simulation Results

Simulation results displayed in UE_Tx_Occupied_BW.dds are shown in the following figure.

Occupied Bandwidth Measurement Results

Benchmark
  • Simulation time is 4 seconds on a P4/2.2G 512M PC powered by MS Windows 2000 and ADS 2003C.

CCDF and Peak-to-Mean Information Measurements

UE_Tx_CCDF.dsn Design

Features
  • 12.2 kbps reference measurement channel
  • CCDF and peak-to-mean measurements using independent model
  • fixed-rate measurement signal source
  • uplink reference measurement channel
  • 40 and 20 msec transmission time intervals
  • 16-bit CRC detection
  • rate 1/3 convolutional coding
  • static rate matching
  • fixed position of transport channel in radio frame
  • BPSK modulation
  • integrated RF components

Description

Complementary cumulative distribution function (CCDF) and peak-to-mean information can be used to measure the performance of an amplifier. The schematic for this design is shown in
the following figure.

UE_Tx_CCDF.dsn Schematic

3GPPFDD_RF_CCDF is used to measure output power; the schematic for this subnetwork is shown in
the following figure; parameters are listed in the following table.

3GPPFDD_RF_CCDF Schematic


3GPPFDD_RF_CCDF Parameters

Name

Description

Value Range

SpecVersion

version of specifications: Version_03_00, Version_12_00, Version_03_02

 

RLoad

input resistance

(0,+∞)

RTemp

temperature of resistor

[-273.15,+∞)

FCarrier

frequency of carrier, in MHz

(0,+∞)

SamplesPerChip

samples per chip

(0,+∞)

FilterLength

length of raised cosine filters in number of symbols

(0,+∞)

LinkDir

link direction: Downlink, Uplink

 

ScrambleCode

index of scramble code

[0, 16777215]

ULScrambleType

uplink scramble code type: LONG, SHORT

 

ScrambleOffset

scramble offset in downlink channels

[0, 15]

DLScrambleType

downlink scramble code type: Normal, RightAlternate, LeftAlternate

 

SpreadFactor

spreading factor

{4,8,16,32,64,128,256,512}

SpreadCode

index of spread code

[0,SpreadFactor-1]

StartSlot

number of slot to be ignored

[0,+∞)

SlotNum

number of slots measured

[1,+∞)

SCH

switch for SCH: On, Off

 

CPICH

switch for CPICH: On, Off

 

SearchLength

search length

(0:(400.0/3840000))

SlotBoundary

slot boundary in terms of sample

 

SlotFormat

slot format

 

Notes

The CCDF model outputs 4 values. The CCDF curve is obtained by plotting the CCDF outputs versus the SignalRange. The peak-to-mean ratio is obtained by subtracting the MeanPower from the PeakPower.

Simulation Results

Simulation results displayed in UE_Tx_CCDF.dds are shown in the following figure.

UE_Tx_CCDF.dsn Simulation Results

Benchmark
  • Simulation time is 6 seconds on a P4/2.2G 512M PC powered by MS Windows 2000 and ADS 2003C.

Spectrum Emission Measurements

UE_Tx_SpecEmissions.dsn Design

Features
  • 12.2 kbps reference measurement channel
  • fixed-rate measurement signal source
  • uplink reference measurement channel
  • 40 and 20 msec transmission time intervals
  • 16-bit CRC detection
  • rate 1/3 convolutional coding
  • static rate matching
  • fixed position of transport channel in radio frame
  • BPSK modulation
  • RF components
  • out-of-band power is measured by sweeping the center frequency of the bandpass filter

Description

The spectrum emission mask of the user equipment applies to frequencies between 2.5 and 12.5 MHz from the user equipment center carrier frequency. The output of channel emission is specified relative to the user equipment output power measured in a 3.84 MHz bandwidth.

The output power measures a bandpass raised-cosine filter with a 3.84 MHz bandwidth. The out-of-channel emission is measured by sweeping the center frequency of another bandpass raised-cosine filter. The schematic is shown in the following figure.

UE_Tx_SpecEmissions.dsn Schematic

3GPPFDD_RF_SpecEmission is used to measure output power; the schematic for this subnetwork is shown in the following figure; parameters are listed in the following table.

3GPPFDD_RF_SpecEmission Schematic


3GPPFDD_RF_SpecEmission Parameters

Name

Description

Value Range

SpecVersion

version of specifications: Version_03_00, Version_12_00, Version_03_02

 

RLoad

input resistance

(0,+∞)

RTemp

temperature of resistor

[-273.15,+∞)

TStep

input time step, in sec

(0,+∞)

FCarrier

frequency of carrier, in MHz

(0,+∞)

ExcessBW

excess bandwidth of raised cosine filters

[0,1]

DeltaFreq

delta frequency, in MHz

 

FilterDelay

filter time delay, in usec

 

SamplesPerChip

samples per chip

(0,+∞)

FilterLength

length of raised cosine filters in number of symbols

(0,+∞)

LinkDir

link direction: Downlink, Uplink

 

ScrambleCode

index of scramble code

[0, 16777215]

ULScrambleType

uplink scramble code type: LONG, SHORT

 

ScrambleOffset

scramble offset in downlink channels

[0, 15]

DLScrambleType

downlink scramble code type: Normal, RightAlternate, LeftAlternate

 

SpreadFactor

spreading factor

{4,8,16,32,64,128,256,512}

SpreadCode

index of spread code

[0,SpreadFactor-1]

StartSlot

number of slot to be ignored

[0,+∞)

SlotNum

number of slots measured

[1,+∞)

SCH

switch for SCH: On, Off

 

CPICH

switch for CPICH: On, Off

 

SearchLength

search length

(0:(400.0/3840000))

SlotBoundary

slot boundary in terms of sample

 

Notes

The bandwidth measurements vary according to frequency offset.

Simulation Results

Simulation results are displayed in UE_Tx_SpecEmissions.dds; the spectrum emission against the emission mask is shown in the following figure.

Spectrum Emission Simulation Results

Benchmark
  • Simulation time is approximately 9 minutes on a P4/2.2G 512M PC powered by MS Windows 2000 and ADS 2003C.


Adjacent Channel Leakage Power Ratio Measurements

UE_Tx_ACLR.dsn Design

UE_Tx_ACLR_SwitchingTransients.dsn Design

Features
  • 12.2 kbps reference measurement channel
  • power in an adjacent channel measured using FFT
  • fixed-rate measurement signal source
  • uplink reference measurement channel
  • 40 and 20 msec transmission time intervals
  • 16-bit CRC detection
  • rate 1/3 convolutional coding
  • static rate matching
  • fixed position of transport channel in radio frame
  • BPSK modulation

Description

UE_Tx_ACLR.dsn measures the frequency domain power; UE_Tx_ACLR_SwitchingTransients.dsn measures the time domain power.

Adjacent channel leakage power ratio (ACLR) is the ratio of the transmitted power to the power measured in an adjacent channel. Better ACLR can be obtained using a longer filter length for the RRC filter in the signal source. The parameter FilterLength has a default value of 16; however, increasing this value to 24 or 32 should result in a better ACLR. This may also correlate better to ACLR measurements when using instruments from Agilent Technologies. Both the transmitted power and the adjacent channel power are measured with a filter that has a root-raised cosine (RRC) filter response with a rolloff of 0.22 and a bandwidth equal to the chip rate.

Power in 4 adjacent channels is measured: 2 above and 2 below the center frequency of the measured signal.

The schematic for UE_Tx_ACLR.dsn is shown in the following figure.

UE_Tx_ACLR.dsn Schematic

3GPPFDD_RF_ACLR is used to measure output power; the schematic for this subnetwork is shown in the following figure; parameters are listed in the following table.

3GPPFDD_RF_ACLR Schematic


3GPPFDD_RF_ACLR Parameters

Name

Description

Value Range

SpecVersion

version of specifications: Version_03_00, Version_12_00, Version_03_02

 

RLoad

input resistance

(0,+∞)

RTemp

temperature of resistor

[-273.15,+∞)

ExcessBW

excess bandwidth of raised cosine filters

[0,1]

FCarrier

frequency of carrier, in MHz

(0,+∞)

SamplesPerChip

samples per chip

(0,+∞)

FilterLength

length of raised cosine filters in number of symbols

(0,+∞)

LinkDir

link direction: Downlink, Uplink

 

ScrambleCode

index of scramble code

[0, 16777215]

ULScrambleType

uplink scramble code type: LONG, SHORT

 

ScrambleOffset

scramble offset in downlink channels

[0, 15]

DLScrambleType

downlink scramble code type: Normal, RightAlternate, LeftAlternate

 

SpreadFactor

spreading factor

{4,8,16,32,64,128,256,512}

SpreadCode

index of spread code

[0,SpreadFactor-1]

StartSlot

number of slot to be ignored

[0,+∞)

SlotNum

number of slots measured

[1,+∞)

SCH

switch for SCH: On, Off

 

CPICH

switch for CPICH: On, Off

 

SearchLength

search length

(0:(400.0/3840000))

SlotBoundary

slot boundary in terms of sample

 

SlotFormat

slot format

 

The schematic for UE_Tx_ACLR_SwitchingTransients.dsn is shown in the following figure.

UE_Tx_ACLR_SwitchingTransients.dsn Schematic

Notes

The subnetwork design ACLR_Filter_Bank.dsn contains the filters for power measurement.

Simulation Results

Simulation results displayed in UE_Tx_ACLR.dds and UE_Tx_ACLR_SwitchingTransients.dds are shown in the following figures. Results meet the ACLR requirements as defined in 3GPP TS 25.101.

UE_Tx_ACLR.dsn Simulation Results

UE_Tx_ACLR_SwitchingTransients.dsn Simulation Results

Benchmark
  • Simulation time is approximately 1 minute on a P4/2.2G 512M PC powered by MS Windows 2000 and ADS 2003C.

Error Vector Magnitude Measurements

UE_Tx_EVM.dsn Design

Features
  • 12.2 kbps reference measurement channel
  • error vector magnitude is measured by the EVM model
  • fixed-rate measurement signal source
  • uplink reference measurement channel
  • 40 and 20 msec transmission time intervals
  • 16-bit CRC detection
  • rate 1/3 convolutional coding
  • static rate matching
  • fixed position of transport channel in radio frame
  • BPSK modulation
  • integrated RF components

Description

Error vector magnitude (EVM) is a measure of the difference between the measured waveform and the theoretical modulated waveform (the error vector). It is the square root of the ratio of the mean error vector power to the mean reference signal power expressed as a percentage. The measurement interval is one power control group (time slot).

The schematic for this design is shown in the following figure. The 3GPP basic model 3GPPFDD_EVM measures the EVM using the received signal and reference signal.

UE_Tx_EVM.dsn Schematic

3GPPFDD_RF_EVM is used to measure output power; the schematic for this subnetwork is shown in the following figure; parameters are listed in the following table.

3GPPFDD_RF_EVM Schematic


3GPPFDD_RF_EVM Parameters

Name

Description

Value Range

SpecVersion

version of specifications: Version_03_00, Version_12_00, Version_03_02

 

RLoad

input resistance

(0,+∞)

RTemp

temperature of resistor

[-273.15,+∞)

ExcessBW

excess bandwidth of raised cosine filters

[0,1]

FCarrier

frequency of carrier, in MHz

(0,+∞)

SamplesPerChip

samples per chip

(0,+∞)

FilterLength

length of raised cosine filters in number of symbols

(0,+∞)

LinkDir

link direction: Downlink, Uplink

 

ScrambleCode

index of scramble code

[0, 16777215]

ULScrambleType

uplink scramble code type: LONG, SHORT

 

ScrambleOffset

scramble offset in downlink channels

[0, 15]

DLScrambleType

downlink scramble code type: Normal, RightAlternate, LeftAlternate

 

SpreadFactor

spreading factor

{4,8,16,32,64,128,256,512}

SpreadCode

index of spread code

[0,SpreadFactor-1]

StartSlot

number of slot to be ignored

[0,+∞)

SlotNum

number of slots measured

[1,+∞)

SCH

switch for SCH: On, Off

 

CPICH

switch for CPICH: On, Off

 

DUT_DelayBound

search length

(0:(400.0/3840000))

EVMValue

EVM value expression options: Ratio, Percent

 

Correct_IQ_Offset

switch for IQ offset correction: Yes, No

 

SlotFormat

slot format

 

Simulation Results

Simulation results are displayed UE_Tx_EVM.dds and shown in the following figure.

EVM Results

Benchmark
  • Simulation time is 30 seconds on a P4/2.2G 512M PC powered by MS Windows 2000 and ADS 2003C.

Peak Code Domain Error Measurements

UE_Tx_Pk_Code_Error.dsn Design

Features
  • 768 kbps reference measurement channel
  • error vector generation
  • peak code domain error calculation
  • fixed-rate measurement signal source
  • uplink reference measurement channel
  • 40 and 10 msec transmission time intervals
  • 16-bit CRC detection
  • rate 1/3 convolutional coding
  • static rate matching
  • fixed position of transport channel in radio frame
  • BPSK modulation
  • integrated RF components

Description

The schematic for this design is shown in the following figure. The code domain error is calculated by projecting the error vector power onto the code domain of the n th layer (spreading factor is 2n) by correlating the error vector with each code. The error vector for each power code is defined as the ratio to the mean power of the reference waveform expressed in dB. The peak code domain error is defined as the maximum value for the code domain error. The measurement interval is one power control group (time slot). The requirement for peak code domain error applies to multi-code transmission only.

UE_Tx_Pk_Code_Error.dsn Schematic

3GPPFDD_RF_PCDE is used to measure output power; the schematic for this subnetwork is shown in the following figure; parameters are listed in the following table. In this case, the spreading factor is 4 and CodeLayer should be set to 2.

3GPPFDD_RF_PCDE Schematic

Name

Description

Value Range

SpecVersion

version of specifications: Version_03_00, Version_12_00, Version_03_02

 

RLoad

input resistance

(0,+∞)

RTemp

temperature of resistor

[-273.15,+∞)

ExcessBW

excess bandwidth of raised cosine filters

[0,1]

FCarrier

frequency of carrier, in MHz

(0,+∞)

SamplesPerChip

samples per chip

(0,+∞)

FilterLength

length of raised cosine filters in number of symbols

(0,+∞)

LinkDir

link direction: Downlink, Uplink

 

ScrambleCode

index of scramble code

[0, 16777215]

ULScrambleType

uplink scramble code type: LONG, SHORT

 

ScrambleOffset

scramble offset in downlink channels

[0, 15]

DLScrambleType

downlink scramble code type: Normal, RightAlternate, LeftAlternate

 

SpreadFactor

spreading factor

{4,8,16,32,64,128,256,512}

SpreadCode

index of spread code

[0,SpreadFactor-1]

StartSlot

number of slot to be ignored

[0,+∞)

SlotNum

number of slots measured

[1,+∞)

SCH

switch for SCH: On, Off

 

CPICH

switch for CPICH: On, Off

 

DUT_DelayBound

search length

(0:(400.0/3840000))

CodeLayer

the code layer to calculate the peak code error

 

Correct_IQ_Offset

switch for IQ offset correction: Yes, No

 

SlotFormat

slot format

 

Simulation Results

Simulation results are shown in the following figure.

Peak Code Domain Error Results

Benchmark
  • Simulation time is 26 seconds on a P4/2.2G 512M PC powered by MS Windows 2000 and ADS 2003C.

Signal Power Distribution Measurements in Code Domain

UE_Tx_Code_Domain_Power.dsn Design

Features
  • code domain power distribution measurement
  • fixed-rate measurement signal source
  • uplink reference measurement channel
  • 40 and 20 msec transmission time intervals
  • 16-bit CRC detection
  • rate 1/3 convolutional coding
  • static rate matching
  • fixed position of transport channel in radio frame
  • BPSK modulation
  • integrated RF components

Description

This design is used to analyze downlink signal power distribution in the code domain. The schematic is shown in the following figure. A fixed-rate signal source is used to generate the baseband signal, pass it through the modulator; an upconverter is used to get the RF signal. The complex envelope of the RF signal is removed to project its power into the code domain.

UE_Tx_Code_Domain_Power.dsn Schematic

3GPPFDD_RF_CDP is used to measure output power; the schematic for this subnetwork is shown in the following figure; parameters are listed in the following table.

3GPPFDD_RF_CDP Schematic


3GPPFDD_RF_CDP Parameters

Name

Description

Value Range

RLoad

input resistance

(0,+∞)

RTemp

temperature of resistor

[-273.15,+∞)

SamplesPerChip

samples per chip

(0,+∞)

FilterLength

length of raised cosine filters in number of symbols

(0,+∞)

ExcessBW

excess bandwidth of raised cosine filters

 

ScrambleCode

index of scramble code

[0, 16777215]

ScrambleType

scramble code type: UL_long, UL_short, DL

 

SpreadFactor

spreading factor

{4,8,16,32,64,128,256,512}

StartSlot

number of slot to be ignored

[0,+∞)

SearchLength

search length

(0:(400.0/3840000))

The received chip stream can be described as a vector Z of complex valued samples. The vector is of length N = n  ×  m, where n is the number of symbol periods in the measurement interval and m is the spreading factor ( m chips per symbol, with one sample per chip). To project Z into the code domain, individual complex valued elements of Z are defined as:

vk where k = 0, 1, ..., N -1.

The chip stream is de-scrambled and divided into symbol vectors,

Ss = { vsm, vsm + 1, vsm + 2, ..., v sm +m -1} for s = 0, 1, ..., n -1

A 2-dimensional matrix is generated of the projections of each received symbol vector onto each code vector Ci ( i = 0, ..., m -1). Ci = ci + jci and ci is the i th spreading code. is its complex conjugate.

By calculating the square of the magnitudes of the terms in PZ we arrive at a matrix of power coefficients which we can further process by summing the values for each code across all symbols and normalizing to the received signal power. This produces the code domain power coefficient vector.

For each code i, we have calculated the projection of a symbol-long segment of the vector V onto code vector Ci for each symbol in the measurement interval. We have summed these projected powers over all symbols then normalized to the received signal power.

The vector of power coefficients can be plotted, at least conceptually, as a histogram to display the power distribution in the code domain for the vector Z.

Simulation Results

Signal power coefficient distribution in the code domain is generated by comparing the code domain power with total power of slot; the result is shown in the following figure.

Signal Power Coefficient Distribution in Code Domain

Benchmark
  • Simulation time is approximately 5 minutes on a P4/2.2G 512M PC powered by MS Windows 2000 and ADS 2003C.

Spurious Emissions Measurements

UE_Tx_SpurEmissions.dsn Design

Feature
  • file-based signal source of test model 1
  • circuit co-simulation

Description

Spurious emissions are caused by unwanted transmitter effects such as harmonics emission, parasitic emission, intermodulation and frequency conversion products, but exclude out-of-band emissions. This design measures harmonics emission using ADS circuit envelope simulator. The following figure shows the schematic for this design.

The timed I, Q source data are generated by WCDMA3G_SignalSource_prj, which measured IF emissions plus third-order harmonic emissions of LO. By changing fundamental frequencies and their order, designers can observe different harmonic emissions. The ITU-R Recommendation SM.329-7[1] defined two mandatory categories of limits for spurious emissions, as referred in [2].

UE_Tx_SpurEmissions.dsn Schematic

Simulation Results

The following figure shows spectrum of signal on carrier frequency.

Main Signal of User Equipment Transmitter

The following figure shows spectrum of spurious emissions on IF frequency plus third-order harmonics of LO frequency.

Spurious Emissions of User Equipment Transmitter

Benchmark
  • Simulation time is approximately 1 minute on a P4/2.2G 512M PC powered by MS Windows 2000 and ADS 2003C.

References
  1. 3GPP Technical Specification TS 34.121 V3.3.0 "Terminal conformance Specification: Radio transmission and reception (FDD)," December 2000.
  2. 3GPP Technical Specification TS 25.101 V3.5.0, "UE Radio transmission and Reception," December 2000.
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