RefNets

RefNet is short for " reference network". A RefNet is a component that is placed in a design that enables the port impedance from another design file in the system (the referenced network) to be referenced as a terminating impedance for the current design file under test. There are two typical applications for RefNets:

1. Inter-stage circuit analysis and design: In some design applications it is desirable to simultaneously evaluate the performance of individual circuit stages terminated in the input and output impedances of adjacent stages. For example, in transistor matching problem, the transistor in the S-parameter test lab can be terminated in the output impedance of the input matching network and the input impedance of output matching network. Further, it is desired that the matching networks be terminated looking into the appropriate side of the transistor. Simulation of these networks simultaneously is accomplished with the S-parameter test lab, see S-Parameter Test Labs and Sequencer for more information. To accomplish the termination of an individual stage referenced to a specific port of other stages in the design chain, the RefNet is utilized in the S-parameter test lab.
   The RefNet is intended to work only for its immediately preceding or succeeding stage with the additional requirement of that stage being in turn properly terminated. In designs containing several stages, proper termination must be used. In a multi-stage design where stage 1 contains the source, the 2nd stage input RefNet can point to the stage 1 output impedance. However, the 3rd stage input RefNet cannot simply point to the stage 2 output impedance. Instead, another design must be created containing stages 1 and 2, and the output impedance of this design must be used.
2. Design specific termination: For some top level DC, AC, or S-Parameter design files, it may be desired to terminate a port whose impedance is characterized by data, from an external file (e.g. S-parameters, Z-parameters, Y-parameters) or some other network.

There are two RefNet components that are available: RefNetTB and RefNetDesign . Both of these components have the same functionality and are supported under DC, AC and S-Parameter analysis, with two differences:

• RefNetTB supports nested network referencing while RefNetDesign does not. See RefNetTB Using an S-Parameter Test Lab for more information on using RefNetTB.
• RefNetTB uses a test bench as the reference design while RefNetDesign uses a standard (non-test-bench) schematic design. See RefNetDesign - File Based Termination for more information on using RefNetDesign.

RefNetTB and RefNetDesign

The parameters of RefNetTB are as follows:

The parameters of the RefNetDesign component are as follows:

Notes:

1. The user cannot push into a RefNet component. If the user wants to view the reference design (test bench), this is accomplished by either toggling design files in the current schematic window or opening a new schematic window and viewing the reference design file there.
2. RefNet components do not support passed parameters.

RefNetTB Using an S-Parameter Test Lab

To best explain this procedure, a tutorial approach will be used. The following example will be considered:
The narrow-band amplifier is partitioned out into three subnetworks: input.dsn, device.dsn, and output.dsn.

Example amplifier circuit

The objective is to place each of these sub-circuits, via test benches, into an S-parameter test lab such that the input and output ports of each subnetwork are terminated with proper terminations, power sources with built-in resistors, or RefNet component.

Procedure

1. Create the input subnetwork from the Example amplifier circuit shown in the previous figure. Save the design as A_TB. Set up the port terminations with:
   • Port 1 of the input network is connected to a 50 ohm source.
   • Port 2 of the input network is terminated into the chain of the device, output network, and its 50 ohm load termination.
     The input subnetwork's schematic and symbol appear in the following figure.
     
     

     Input subnetwork

2. Create the active device subnetwork from the amplifier circuit shown in the figure above, Example amplifier circuit. Save the design as B_TB. Set up the port terminations with:
   • Port 1 of the device is terminated into port 2 of the input network and its port 1 termination.
   • Port 2 of the device is terminated into port 1 of the output network and its port 2 termination.
     The active device subnetwork's schematic and symbol appear in the following figure.
     
     

     Active device subnetwork

3. Create the output subnetwork from the amplifier circuit shown in the figure above, Example amplifier circuit. Save the design as C_TB. Set up the port terminations with:
   Port 1 of the output network is terminated in the reverse chain from the device output, the input circuit, and its 50 ohm source termination.
   The output subnetwork's schematic and symbol appear in the following figure.
   
   

   Output subnetwork

4. A Term and a RefNetTB are placed in A_TB to emulate the effective configuration.
   
   

   Desired effect of test bench A_TB (input)

   
   

   Test bench A_TB completed

   Take note of the RefNetTB parameters as follows:

   Num=2	Port 2 of the test bench
   RefTestBenchName="B_TB"	Points to the device test bench shown, which in forthcoming steps will be terminated with C_TB.
   RefPortNum=1	The port number of B_TB where the impedance is taken.

5. Two RefNetTB components are placed in B_TB (device test bench) to emulate the effective configuration.
   
   

   Desired effect of test bench B_TB (input) with Term and RefNetTB placed

   
   

   Test bench B_TB completed

   Take note of the RefNetTB s placed as follows:
   
   

   Term1 Parameters
   Num=1	Port 1 of the test bench
   RefTestBenchName="A_TB"	Points to the input test bench.
   RefPortNum=2	The port number of A_TB where the impedance is taken.

   
   
   

   Term2 Parameters
   Num=2	Port 2 of the test bench
   RefTestBenchName="C_TB"	Points to the output test bench.
   RefPortNum=1	Port number of C_TB where the impedance is taken.

6. A RefNetTB and a Term are placed in C_TB (output test bench) to emulate the effective configuration.
   
   

   Desired effect of test bench C_TB (output) with RefNetTB and Term placed

   
   

   Test bench C_TB completed

   Take note of the RefNetTB parameters as follows:

   Num=1	Port 1 of the test bench
   RefTestBenchName="B_TB"	Points to the device test bench shown in the figure above, Test bench B_TB completed which in is nested to A_TB via the test bench shown in the figure above, Test bench A_TB completed.
   RefPortNum=2	This is the port number of B_TB where the impedance is taken.

7. With test benches A_TB, B_TB, and C_TB, finished, the S-parameter test lab is created.
   
   

   Completed S-parameter test lab incorporating RefNetTB

8. There is an optional step that may be desirable. The input, device, and output, can be placed into one test bench for viewing performance of the entire circuit chain.
   
   

   Test bench for entire circuit chain

   
   

   S-parameter test lab incorporating sub-circuit and entire circuit, ABC_TB, test benches

RefNetDesign - File Based Termination

The steps to create a file-based termination are as follows:

1. Create a sub-circuit that reads in data file. For this example, a one-port s-parameter file is used.
2. Save the design file from step 1 as read_term_data.dsn .
   
   

   Top-level one-port design file to read in S-parameter data file

3. In a design file that contains the circuit under test, place RefNetDesign at the pin where the S-parameter-based termination is to be applied.
   
   

   Top-level design that references a file-based one-port network to realize a file-based termination

The parameters of RefNetDesign were assigned as follows: