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BER Validation Design Examples

Introduction

The WCDMA3G_BERValidation_prj project contains the example designs to test BER performance.

Two designs are used to test channel coding performance over an AWGN channel:

  • Convolutional Coding: 3GPPFDD_ConvCode.dsn
  • Turbo Coding: 3GPPFDD_TurboCode.dsn

The source for BER test is a random bit stream with 50 percent probability for 0 and for 1. The bit stream is turbo or convolutionally coded using polynomials specified by 3GPP specification. The coded bits are modulated as dipolar signals and go through an AWGN channel. The signals are taken as float inputs and are not quantized. Signals are then decoded by the classic Viterbi or MAP turbo decoder, and the hard decision is compared with the original bit stream for the BER value.

These are classic tests (see [1] and [2] ) and the BER values are reasonable compared with many references covering modern coding theory.

The channel coding and decoding models take the parameters for transport channel configuration. These parameters can be converted as coding block size and block number using the 3GPPFDD_TrCH_Cal model.

Two designs are used to test the UE and BS fading channel performance.

  • Base station receiver performance test: 3GPPFDD_BS_Rx_Performance.dsn
  • User equipment receiver performance test: 3GPPFDD_UE_Rx_Performance.dsn

There are 5 cases defined for 3GPP fading channel profile. The channel profile selected for these designs is fading channel case 1. 3GPP FDD reference measurement channel 12.2 kbps is selected. If other channel profiles or reference measurement channels are selected, the signal source, the channel, and the receiver must be re-configured.

The tests take the channel information from the channel model output and there is no channel estimation error. For multipath fading channel, the receiver samples the received signals from different positions to locate the different propagation paths. These sampling positions are pre-determined and are set up by the PathDelaySample parameter.

For information regarding channel delay search as well as the method for determining channel information, refer to the RAKE receiver documentation.

Two designs are used to test HS-DPCCH performance:

  • HS-DPCCH performance over AWGN channel: 3GPPFDD_HS_UL_AWGN_BER.dsn
  • HS-DPCCH performance over fading channel: 3GPPFDD_HS_UL_Fading_BER.dsn

HARQ-Ack and CQI information are transmitted via HS-DPCCH. The transmission quality of HARQ-Ack is evaluated by BER performance. The CQI transmission quality is measured by the RMS error between the received and transmitted CQI values.

Viterbi Decoder Performance for Rate 1/3 and 1/2 Convolutional Coding

3GPPFDD_ConvCode_BER.dsn Design

Features
  • soft-decision Viterbi decoder for 3GPP convolutional coding
  • BER performance over AWGN channel
  • 3GPP convolutional coding performance benchmark

Description

For convolutional coding the constraint length is 9 and Rate 1/3 and 1/2 Viterbi decoders are tested. The schematic for this design is shown in the following figure.

3GPPFDD_ConvCode_BER Schematic

Simulation Results

Simulation results displayed in 3GPPFDD_ConvCode_BER.dds are shown in the following figure.

Simulation Results

Benchmark
  • Hardware Platform: P4 1.8 GHz/512 MB memory
  • Software Platform: Windows XP, ADS 2002
  • Data Points: 10,000,000 bits
  • Simulation Time: approximately 2 hours

MAP Decoder Performance for Rate 1/3 Turbo Coding

3GPPFDD_TurboCode_BER.dsn Design

Features
  • MAP decoder for 3GPP turbo coding
  • BER performance over AWGN channel
  • 3GPP turbo coding performance benchmark (blocksize is 1040)

Description

The turbo decoder is tested with a block size equal to 1040. The BER values are obtained when the number of iterations is 2 to 9. The coding block could affect the turbo decoder performance. From iterations 6 to 9, there is no signification decoding gain. The schematic for this design is shown in the following figure.

3GPPFDD_TurboCode_BER Schematic

Simulation Results

Simulation results displayed in 3GPPFDD_TurboCode_BER.dds are shown in the following figure.

Simulation Results

Benchmark
  • Hardware Platform: P4 1.8GHz/512 MB memory
  • Software Platform: Windows XP, ADS 2002
  • Data Points: 10,000,000 bits
  • Simulation Time: approximately 30 hours

References

  1. G. D. Forney, "The Viterbi algorithm," Proc. IEEE, vol. 61, pp. 268-278, Mar, 1973.
  2. C. Berrou and A. Glavieus. "Near optimum error correcting coding and decoding: turbo-codes," IEEE Trans. Comm., pp. 1261-1271, Oct. 1996.

Base Station Receiver Performance Test

3GPPFDD_BS_Rx_Performance.dsn Design

Features
  • BS BER performance over fading channel
  • Fading channel BER measurement under ideal conditions

Description

The modulated uplink signal source is fed to the 3GPP channel model. The channel model is configure as fading channel case 1. Then the faded signals are contaminated by AWGN noise, which gives the desired Eb/No value. The receiver gets the channel information from the channel model output and samples the signals at pre-determined positions to get the signals propagated over different paths. The schematic for this design is shown in the following figure.

3GPPFDD_BS_Rx_Performance Schematic

The target bit energy to noise density ratio ( Eb/N 0) is calculated as below: the ( Eb N 0)DPDCH observed over physical channel can be calculated as:

Please note the DPCCH power doesn't contribute to BER performance so that ( SignalPower )DPDCH in the above equations is obtained be scaled by total power by the DPDCH/DPCCH ratio:

Taking the channel coding gain into, the target Eb/N 0 can be obtained as:

while

If repetition/puncturing is performed by rate matching, the rate match ratio shall be included in the channel coding gain. Using the equations listed above, the AGWN noise density can be calculated and signals with desired Eb/N 0 value can be obtained.

Simulation Results

Simulation results displayed in 3GPPFDD_BS_Rx_Performance.dds are shown in multiple pages. See the following figures.

Main Page

Figures Page

Equations Page

Benchmark
  • Hardware Platform: P4 1.7 GHz/512 MB memory
  • Software Platform: Windows 2000, ADS 2003C
  • Data Points: 4 10 msec frames
  • Simulation Time: approximately 200 seconds

User Equipment Receiver Performance Test

3GPPFDD_UE_Rx_Performance.dsn Design

Features
  • UE BER performance over fading channel
  • Fading channel BER measurement under ideal conditions

Description

Power of the modulated downlink signal source is calibrated to Ior dBm/3.84 MHz. The gain of each channel is calibrated to give the desired DPCH_Ec/Ior ratio. This signal is fed to the 3GPP channel model. The channel model is configure as fading channel case 1. Then the faded signals are contaminated by AWGN noise whose power is calibrated as Ioc dBm/3.84 MHz. The receiver gets the channel information from the channel model output and samples the signals at pre-determined positions to get the signals propagated over different paths. The schematic for this design is shown in the following figure.

3GPPFDD_UE_Rx_Performance Schematic

The power level of the signals input to the receiver is normalized to 10 dBm.

Simulation Results

Simulation results displayed in 3GPPFDD_BS_Rx_Performance.dds are shown in the following figures.

Main Page

Figures Page

Equations Page

Benchmark
  • Hardware Platform: P4 1.7 GHz/512 MB memory
  • Software Platform: Windows 2000, ADS 2003C
  • Data Points: 4 10 msec frames
  • Simulation Time: approximately 400 seconds

Uplink HS-DPCCH Performance over AWGN Channel

3GPPFDD_HS_UL_AWGN_BER.dsn

Features
  • HARQ-Ack BER performance over AWGN channel
  • CQI transmission quality measured by RMS error

Description

The HARQ-Ack and CQI information are coded and multiplexed to form the HS-DPCCH sub-frame. The HS-DPCCHs are modulated and spread with DPCCH and DPDCH; DPCCH and DPDCH are configured according to reference measurement channel 12.2 kbps.

At the receiver side, the soft information of HS-DPCCH obtained by rake receiver is de-multiplexed as coded HARQ-Ack and CQI bit streams. The HARQ-Ack and CQI information is then recovered by channel decoders. BER is measured for HARQ-Ack and RMS error is measured for CQI.

The schematic for this design is shown in the following figure.

3GPPFDD_HS_UL_AWGN_BER Schematic

Simulation Results

Simulation results displayed in 3GPPFDD_HS_UL_AWGN_BER.dds are shown in the following figure. Note that Eb/No is calculated at the rake receiver input.

Differences between the transmitted CQI sequence (denoted by Ti) and the received CQI (denoted by Ri) are measured. Error definitions are:

  • Error_Abs = average of abs( Ti - Ri)
  • Error_Abs_Ratio = Error_Abs/average of abs( Ti)
  • Error_RMS = sqrt(average of ( Ti - Ri)2)
  • Error_RMS_Ratio = Error_RMS/average of ( Ti)2.

Simulation Results

Benchmark
  • Hardware Platform: P4 1.8 GHz/512 MB memory
  • Software Platform: Windows XP, ADS 2003C
  • Data Points: 300 sub-frames
  • Simulation Time: approximately 10 minutes

Uplink HS-DPCCH Performance over Fading Channel

3GPPFDD_HS_UL_Fading_BER.dsn Design

Features
  • HARQ-Ack BER performance over fading channel
  • CQI transmission quality measured by RMS error

Description

This design is the same as the 3GPPFDD_HS_UL_AWGN.dsn except the signal is upconverted to radio frequency 1950 MHz and passed through a multipath fading channel; channel profile is:

  • 120 km per hour
  • Gain array for the 2 paths is 0 dB, −10 dB
  • Delay array for the 2 paths is 0 nsec, 976 nsec

The schematic for this design is shown in the following figure.

3GPPFDD_HS_UL_Fading_BER Schematic

Simulation Results

Simulation results displayed in 3GPPFDD_HS_UL_Fading_BER.dds are shown in the following figure. Note that Eb/No is calculated at the input of rake receiver.

Differences between the transmitted CQI sequence (denoted by Ti) and the received CQI (denoted by Ri) are measured. Error definitions are:

  • Error_Abs = average of abs( Ti - Ri)
  • Error_Abs_Ratio = Error_Abs/average of abs( Ti)
  • Error_RMS = sqrt(average of ( Ti - Ri)2)
  • Error_RMS_Ratio = Error_RMS/average of ( Ti)2.

Simulation Results

Benchmark
  • Hardware Platform: P4 1.8 GHz/512 MB memory
  • Software Platform: Windows XP, ADS 2003C
  • Data Points: 30 sub-frames
  • Simulation Time: approximately 10 minute
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