Page tree
Skip to end of metadata
Go to start of metadata


3GPPFDD_UL_Rake



Description: Uplink receiver for dedicated physical channel
Library: 3GPPFDD, Receiver
Class: SDF3GPPFDD_UL_Rake
Derived From: 3GPPFDD_UL_Receiver_Base

Parameters

Name

Description

Default

Unit

Type

Range

SpecVersion

version of specifications: Version_03_00, Version_12_00, Version_03_02

Version_12_00

 

enum

 

SlotFormat

slot format

0

 

int

ScrambleCode

index of scramble code

0

 

int

[0:512] for downlink;
[0, 16777215] for uplink

Scramble

scramble code type: LONG, SHORT

LONG

 

enum

 

SampleRate

sample rate

8

 

int

[1:256]

MaxDelaySample

maximum delay boundary, in terms of samples

0

 

int

[0:2559] for RAKE receiver;
[0:102400] in other models

ChannelType

select the channel type to be processed: CH_GAUSSIAN, CH_FADING

CH_GAUSSIAN

 

enum

 

ChannelInfo

fading channel information source: Known, Estimated

Known

 

enum

 

ChannelInfoOffset

offset between spread code and channel information in terms of sample

0

 

int

[0:MaxDelaySample]

PathSearch

path search frequency: EverySlot, Once

Once

 

enum

 

SearchMethod

path search method: Coherent, NonCoherent, Combined

Coherent

 

enum

 

SearchSlotsNum

number of slots for path search

1

 

int

[1:6]

PathNum

number of Rake fingers

1

 

int

[1:6]

PathDelaySample

delay for each finger, in terms of samples

0

 

int array

[0:MaxDelaySample];
array size shall be equal to PathNum

OutputSNR

switch for SNR estimation: SNR_Active, SNR_Deactive

SNR_Deactive

 

enum

 

† [0:5] for uplink DPCCH;
[0:16] for downlink DPCH;
[0:17] for downlink SCCPCH;
[0:5] for uplink PCPCH (Ver 03_00);
[0:2] for uplink PCPCH (Ver 12_00);
[0:1] for uplink PCPCH (Ver 03_02).

Pin Inputs

Pin

Name

Description

Signal Type

1

inChip

input data stream

complex

2

PCNin

physical channel number

int

3

SltFin

slot format

int

4

inChM

input known channel information

multiple complex

Pin Outputs

Pin

Name

Description

Signal Type

5

Cout

output DPCCH stream

real

6

SNR

signal to noise ratio

real

7

SlotIndex

slot number

int

8

PCNout

physical channel number

int

9

SltFout

slot format

int

10

Delay

path delay

int

11

DoutM

output DPDCH stream

multiple real

12

outChM

output estimated channel information

multiple complex

Notes/Equations
  1. This model demodulates and despreads UTRA/WCDMA uplink signals at a 3.84 MHz chip rate; such signals can be corrupted by multipath fading channel and additive Gaussian noise.
  2. To despread and demodulate a CDMA signal, the channel information and path delay information must be determined. Errors in channel estimation and path search deteriorate the receiver performance.
  3. The signal processing flow inside the model is:
    • Input data until slots specified by SearchSlotsNum are received
    • Slot index identification
    • IQ offset correction to eliminate any DC component.
    • Multipath search
    • Channel estimation for each path
    • Decode and despread of individual path
    • SNR estimation for individual path
    • Multipath combination
    • SNR estimation after multiple path combination
    • Output decoded data and SlotIndex to align at the frame boundary
    • Output SNR, Delay and channel information (slots delayed are specified by SearchSlotsNum)
  4. This model can be configured to work under ideal conditions; in other words, the real time channel information can be input from input pin and the path delay information can be set by the PathDelaySample parameter. The ChannelInfo parameter selects channel information source from input or estimated inside the model. The delay for each path is expressed in terms of samples as individual elements in the array.
  5. If path delay is specified, the SearchSlotsNum is 1.
    If the first element in PathDelaySample is 0, the path search is performed inside the receiver model. Otherwise, the numbers specified by PathDelaySample are taken as the delays for each path.
  6. The path search is performed by correlating the received signals with the spreading code specified in a window whose size is set by MaxDelaySample. The correlations at different offsets are ranked and the top ones are assumed to be the offsets where the paths could occur.
  7. If SearchMethod = Coherent, the correlation will be performed at the pilot bits only. If SearchMethod = NonCoherent, the correlation will be performed on the data field. Note that the coherent correlation obtained over pilot bits is unbiased, while the non-coherent correlation is biased. If SearchMethod = Combined, the coherent and non-coherent correlations are summed as the matrix for path resolution.
  8. Another factor that impacts the correlation is the SearchSlotsNum parameter. This parameter sets the number of slots over which the correlation is accumulated. More slots are necessary for a reliable path resolution for signals with noise contamination. Usually, 6 slots are required if Eb/No is 2 dB. The designer must determine the appropriate slot number and search method for the best trade-off between accuracy and speed.
  9. The estimated path delay is output from the pin Delay after slots specified by SearchSlotsNum are received.
  10. Because path search results could be biased when channel noise is large, the path delay should be determined before simulation.
    For example, if a path delay is 552 nsec and channel gain is −20 dB, if channel noise is large it could be difficult for the Rake receiver to correctly resolve this path. In this case, simply increase channel gain to a larger value and decrease the noise level to a very small level. (These changes do not change the channel delay profile.)
    The first value of PathDelaySample is set to 0. At start of simulation, the path delay is displayed in the simulation window.

    The path delay determined by the Rake receiver is 145. This value has high credibility because it is obtained under large signal to noise level. Specify this delay in PathDelaySample and the Rake receiver will use this value during simulation. (Note that the channel gain and noise level will be restored to the original level after the channel delay is fixed.)
  11. If the path delay is fixed, the path search is necessary only at the start of simulation; in this case, set PathSearch to Once to save simulation time. Otherwise, PathSearch must be performed for each slot received to update the path delay information that could be dynamic.
  12. Channel estimation varies according to channel type.
    • If ChannelType = CH_GAUSSIAN, the channel is assumed to be time-invariant and the IQ phase shift is estimated using the pilot field of the signals received so far.
    • If ChannelType = CH_FADING, channel characteristics are assumed to be time-variant and more complicated channel estimation must be used. A simple channel estimation is used that takes the fading characteristic averaged over the pilot field of the current slot as the channel information for the entire slot.
  13. Channel information that is estimated or known from input pins is output from the pin outChM for reference. Each firing, 2560 tokens are produced as the channel information for the chips in the slot indicated by SlotIndex.
  14. This model estimates the signal to noise power ratio (SNR) of DPCCH over different paths if OutputSNR is enabled. The SNR is performed over pilot bits of DPCCH so that the results are unbiased. The SNR is estimated over individual paths, then the overall SNR is estimated after multipath combination. The SNR is output in sequence:

    DPCCH SNR after path combination
    DPCCH SNR path 1
    .
    .
    .
    DPCCH SNR path n

  15. All paths are combined assuming that all the paths are useful in improving the decoding reliability. Some paths with low SNR are actually harmful to the final SNR improvement. The designer must determine the PathNum setting for better decoding performance in multipath conditions.
  16. For uplink, the DPDCH slot format and DPDCH number varies with TFCI. The normal procedure is to decode DPCCH first for the TFCI information, then the TFCI is used to select the transport format and the DPDCH number and slot format are determined by rate match algorithm. To simplify, the DPDCH number and slot format are input from input ports available in the signal source side. If the DPDCH slot format and DPDCH number are fixed, such as the reference measurement channel, these can be set to constant.
    For the reference measurement channel specified in 3GPP specifications, the DPDCH number and slot format are fixed numbers.
  17. Each firing, input tokens is 2560 × SampleRate. There is a delay in terms of slots associated with the decoded information. The SNR results are output after firings equal to SearchSlotsNum. Other outputs are aligned at the frame boundary; for example, if the first received slot index is 0, the decoded bit stream will be output after 15 slots.
  18. If the path delay is set by parameter, the SNR output delay is 1 slot and the other output delay is 15 slots.
  19. If the 3GPP signal is S(t), this signal may be delayed t1 by some filters (such as the Tx RC filters). So, the delayed signal is S(t-t1) and the signal from 0 to t1 is zero and the real 3GPP signal transmission starts from t1. When the delayed signals pass through a fading channel, the fading factor is applied to the overall signals starting from time 0. The offset t1 must be known if the receiver of the channel information is input from outside; this offset is expressed in terms of samples.
    The following description provides more details.
    Denote the signal source output as:

    S1, S2, S3, ... , Si, ...

    These signals are fed to the transmitter module, and the transmitter module introduces delay (for example, the square root raised-cosine filter introduces the delay that is related with the filter length); denote this delay as N .
    The output signals from transmitter module are:

    0, 0, 0, ... , 0, S1, S2, S3, ... , Si, ...

    The number of 0s is N. These signals are fed to the fading channel model. The fading channel module generates the fading factors, that can be denoted as

    f1, f2, f3, ... , fi, ...

    These factors will be applied to the input signals and can also be input to the Rake receiver as phase reference. The resultant faded signals are

    f1×0, f2×0, f3×0, ..., fN×0, ..., fN+1× S1, fN+2× S2

    Note that the faded signal must pass the receiver module that introduces additional delay; this does not impact the channel information offset setting.
    The channel information being input to the Rake receiver is

    f1, f2, f3, ... , fi, ...

    The Rake receiver must know the offset between the faded signal and the known channel information. In this case, the offset is N , and the Rake receiver will take the N th input from the channel information input and correlate it with the signal start point. The signal start point is determined by the synchronization module implemented inside the Rake receiver.

References
  1. Refer to References.
  • No labels